When data is stored,
compressed, or communicated through a media such as cable or air, sources of
noise and other parameters such as EMI, crosstalk, and distance can considerably
affect the reliability of these data. Error detection and correction techniques
are therefore required. Some of those techniques can only detect errors, such
as the Cyclic Redundancy Check others are designed to detect as well as correct
errors, such as Salomon Codes.However, the existing techniques are not able to
achieve high efficiency & to meet bandwidth requirements, especially with
the increase in the quantity of data transmitted. Orthogonal Code is one of the
codes that can detect errors and correct corrupted data. This project is to
enhance the error control capabilities of orthogonal codes by means of Field
Programmable Gate Array (FPGA) implementation.
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